IP Physical Design Engineer (Senior/Lead)

SunGreenH2

SunGreenH2

Design

Bengaluru, Karnataka, India

Posted on Apr 12, 2026
Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Hardware Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.


OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

The Responsibilities Of This Role Include

  • Job responsibilities include design and development of custom macro using
  • Physical design at HM level using Icc2/Innovus tools
  • Floorplaaning, CTS, Routing using custom methodology.
  • EM/IR signoff though RedHawk
  • Timing Signoff and Physical verification
  • Formal verification
  • Candidate should be able to collaborate with different teams.
  • Physical Design using industry-standard RTL2GDS flow including Synopsys ICC2, Cadence Encounter.
  • Scripting in Perl/Python/Shell/Tcl for productivity is a plus
  • IP development (custom macro transistor level design, physical integration, collateral generation, flow development) and PPA quantification.
  • Taking responsibility for own work and making decisions with limited impact; Impact of decisions is readily apparent; errors made typically only impact timeline (i.e., require additional time to correct).
  • Using verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area.
  • Completing most tasks with multiple steps which can be performed in various orders; some planning and prioritization must occur to complete the tasks effectively; mistakes may result in some rework.
  • Exercising some creativity to troubleshoot technical problems or deal with novel circumstances.
  • Using deductive problem solving to solve moderately complex problems; most problems have defined processes of diagnosis/detection; some limited data analysis may be required.


Experience : 2 to 5 years of relevant experience in Physical Design (IP domain)

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