Preferred Qualifications

• 8+ years of experience in IP architecture, micro-architecture and design.
• Good understanding of SOC. Possesses expertise in any one of the following technical areas is a plus: DDR, Interconnects, SOC power management, clock/reset, Compression, Encryption, ECC
• Understanding of ARM architecture (Coherency, bus interconnects, Security, arch evolution)
• Good communication and work with minimal supervision
• Collaborate with Perf, Design and System team stakeholders in developing solutions
• Experience with Verilog, logic design principles with timing, area and power implications.
• Experience in testplan development, UVM, will be a great asset
• Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI.
• Good Understanding of concurrency, bandwidth, latency and system level aspects

Education Requirements: Bachelor's degree in Electrical Engineering required, Master's or Doctorate preferred